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The 5nm process seems to be stable. TSMC is ready for the A14 chip.

via:威锋网     time:2019/4/9 12:01:24     readed:139

TSMC announced that it will provide a complete version of its 5nm chip design infrastructure within its Open Innovation Platform (OIP), enabling the design of a 5 nanochip system (SOC) in next-generation advanced mobile and high performance computing applications.

The chip is aimed at the fast-growing 5G and artificial intelligence markets, and paves the way for the introduction of the 5nm A14 chip in 2020.

TSMC has been the sole supplier of Apple A-series chips since 2016. It is widely believed that TSMC's packaged products are superior to other chip manufacturers such as Samsung and Intel. Therefore, TSMC will continue to monopolize Apple's A-series chip orders in 2019 and 2020 to produce A13 chips and A14 chips. Over the years, TSMC has continued to improve its manufacturing process, from A10 Fusion's 16nm, A11 Bionic's 10nm all the way to A12 Bionic's 7nm. Thanks to the simplification of the EUV lithography process, the A13 chip is likely to reach 7nm+ levels.

Cliff Hou, vice president of R&D and technology development at TSMC, said: "TSMC's 5nm technology provides our customers with the industry's most advanced logic flow to meet the exponential growth in computing power driven by artificial intelligence and 5G. 5 Nanotechnology requires deeper design technology for collaborative optimization. Therefore, we work seamlessly with our ecosystem partners to ensure that we provide validated IP blocks and EDA tools for our customers. We will continue to do so. Helping customers achieve test success and bring products to market faster."

Compared to TSMC's 7nm process, the innovative feature of the 5nm chip is that the ARM ®Cortex ®- A72 core provides 1.8 times the logical density and 15% speed gain of the previous generation. The 5nm process has the advantages of simplifying the EUV lithography process, making good progress in yield learning and reaching the best technical maturity of TSMC at present. The SRAM and simulation area reduction are achieved through the process architecture of TSMC. The process has the advantages of simplifying the EUV photolithography process, and achieving the best technical maturity of TSMC at present.

TSMC's 5nm process is already in the initial stage of risk production and plans to invest $25 billion in mass production by 2020. According to reports, their goal is to achieve 3nm process production in 2022.

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